1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device, and, more particularly, to such a method which includes a patterning process for etching an oxide layer on a metal material.
2. Description of the Related Art
Recently, semiconductor display devices have been developed which employ an active matrix type liquid crystal display (LCD) using a thin film transistor (TFT) as a switching device. The LCD is comprised of a TFT array using an amorphous silicon (a-Si) layer capable of being formed on a cheap glass substrate to provide a large scale, high density, high quality picture. Also, such remarkable flat panel displays can be provided at relatively low costs.
The LCD is comprised of an array of TFTs (or pixels) and, as shown in FIG. 1, each such TFT (Tr) is provided at a crossover point between each of a plurality of address lines (A1, A2, . . . An) and each of a plurality of data lines (Di, D2, . . . Dn). Each TFT (Tr), as shown, includes three electrodes, one of which is connected to a pixel electrode of liquid crystal cell (LC) and which also forms an electrode of a storage capacitance (Cs), another of which is connected to a data line, and the third of which is connected to an address line. Although not shown in FIG. 1, insulating layers are provided between the address lines and the data lines as well as between the pixel electrode and the Cs line.
In this structure of the TFT array, if there is an electrical short between an address line and a data line, line defects are caused in the two shorted lines. If an electrical short occurs between a pixel electrode and the Cs line of that TFT, a point defect is caused.
To prevent these kinds of electrical shorts, a method has been proposed in which an anodic oxide layer, devoid of pin holes, is used to cover the surfaces of the address lines and the Cs lines. According to the proposed method, a part of the anodic oxide, which is to be a contact portion connected to driving circuits of an address line or a data line, must be etched. Alternatively the contact portion is covered by a resist material to prevent the formation of an anodic oxide layer thereon. With this latter method, one extra photolithography process is necessary to form contact portion. From the standpoint of manufacturing costs, the former method is more desirable than the latter method. To achieve the former etching method, a selective etching of only the anodic oxide layer on the metal material of the address line and the data line must be carried out. Conventionally, a tantalum (Ta), a molybdenum-tantalum (Mo--Ta) alloy, and a tungsten-tantalum (W--Ta) alloy are used as the metal material, but an effective method for selectively etching the anodic oxide layer of these materials, without also etching the metal thereof, has not been known.
Reactive ion etching of these metals and the oxides thereof has been proposed. For example, a method of a reactive ion etching (RIE) of tantalum, by using a CF.sub.4 gas or a CCl.sub.4 gas was reported by Somekhard et al., Applied Optics: 1977, p. 126. A method of reactive ion etching TaOx, by using a gas mixture of CF.sub.4 and O.sub.2 or CF.sub.4 and H.sub.2 was reported by Seki et al., Journal of Electrochemical Society, 1983, p. 2505.
However, a selective etching of the anodic oxide layer with an etching rate ratio more than one, e.g., Ta.sub.2 O.sub.5 on the metal material, e.g., Ta, has not been known, because the selective etching of Ta.sub.2 O.sub.5 as against Ta is generally difficult to accomplish. Also, even in a wet etching method, a selective etching of Ta.sub.2 O.sub.5 on Ta has not been known.
As described above, in the conventional method, it is difficult to etch the anodic oxide layer on the metal material selectively with an etching rate ratio more than one. Therefore, the manufacture of semiconductor device which uses an anodic oxide layer as an insulating layer has been limited.